Low Voltage, Energy Efficient Analog Circuits For Low Power Applications

Abstract

This thesis presents low voltage, compact and energy efficient linear/non- linear analog circuits for low power applications. Single branch and log domain filters, translinear RMS-DC converter and PTAT current reference have been explored. UMC 65 nm/UMC 180 nm CMOS technologies are used to design these circuits and simulations are carried out in Cadence Virtuoso tool. Initial part of the thesis outlines compact, single branch and log domain filters. A novel, compact and energy-efficient biquad which is derived from a folded single branch transistorised gm -C structure is proposed. The biquad has a small number of active devices stacked between VDD and GND rails and hence can be used satisfactorily in a low-voltage environment. The filter also inherits the benefits of folding in the circuit which makes the tuning of the filter easier and power independent. A fourth-order low pass filter is used as a vehicle to illustrate the performance of the proposed biquad. The fully differential version of the filter operates with a supply voltage of 0.6 V, is biased with a current of 100 nA, has a -3 dB bandwidth of 15 kHz and shows a dynamic range as high as 61 dB. A first order low pass filter employing the log-domain technique is also proposed. The filter design is based on the dynamic translinear principle which exploits the non-linear current-voltage relationship of MOSFETs operating in sub-threshold region. The core of the filter is a second order translinear loop. The filter consumes a power of 55 nW from a 0.9 V supply voltage. The cut-off frequency of the filter is 1 kHz for a bias current of 5 nA. The filter has a dynamic range of 56 dB and a FoM of 0.069 pJ. This thesis also presents a novel current-mode true RMS-DC converter based on the dynamic translinear principle. The converter is designed using a third-order translinear loop, resulting in a very compact and simple circuit. The proposed circuit operates with 1 V power supply, has only 14 transistors and performs satisfactorily over a wide input current range of 300 nA - 950 nA and for a frequency range of 600 Hz - 650 kHz for a capacitance of 10 nF. The frequency range of operation can be tuned by varying the external off-chip capacitor and the bias current. The circuit vconsumes 20 nW static power, 1.6 µW maximum dynamic power and offers the lowest FoM among the other RMS-DC converter circuits presented in the literature. This work also proposes a low voltage, low power, fast settling switched capacitor based Proportional to Absolute Temperature (PTAT) current reference circuit. Unlike in a conventional resistor based PTAT current source, the proposed circuit saves a significant amount of silicon area on chip and hence the circuit becomes less susceptible to process variations. It creates a reference current of 1 nA from a 0.5 V power supply at room temperature (27◦ C). It has PTAT characteristics in the temperatures from −10◦ C to 80◦ C. The circuit draws a very low power of 1.5 nW and exhibits a good supply voltage sensitivity of 3.2 %/V. A startup circuit connected to the PTAT source improves the transient response by reducing the settling time. A low power low frequency active-RC filter for ECG detection is also pre- sented. A folded cascode Operational Transconductance Amplifier (OTA) with transistors operating in sub-threshold region at 1.2 V supply voltage is designed which consumes a power of 30 nW. A second order LPF with a cut-off frequency of 50 Hz is built with the designed OTA. To achieve this low bandwidth, current steering technique is used instead of traditional method of using large resistor and capacitor values and hence the design is area efficient. The filter consumes a power of 80 nW, has a dynamic range of 49 dB and shows a FoM of 0.4 pJ.