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DC Field | Value | Language |
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dc.contributor.author | Naik, B.S. | |
dc.contributor.author | Venkataramanaiah, J. | |
dc.contributor.author | Reddy, K.S. | |
dc.contributor.author | Suresh, Y. | |
dc.date.accessioned | 2020-03-30T10:02:35Z | - |
dc.date.available | 2020-03-30T10:02:35Z | - |
dc.date.issued | 2017 | |
dc.identifier.citation | Proceedings of the International Conference on Inventive Systems and Control, ICISC 2017, 2017, Vol., , pp.- | en_US |
dc.identifier.uri | http://idr.nitk.ac.in/jspui/handle/123456789/7640 | - |
dc.description.abstract | In this project level shifted bipolar sinusoidal Pulse Width Modulation techniques are developed over new symmetrical seven level inverter topology. The proposed SPWM techniques are Phase Disposition Technique, Phase Opposition Disposition Technique and Alternate Phase Opposition Disposition Technique which are under hard switching techniques. More number of components, complex switching patterns and charge balance problems are disadvantages of traditional cascaded MLI [1]. In this new topology, reversing voltage component is used in order to reduce the drawbacks mentioned above. So, it possesses fewer components especially in higher level inverters, reduced losses and stress over the components. Proposed techniques are validated on MATLAB-SIMULINK software. Among all the techniques, Phase Opposition disposition technique produced high RMS output voltage with low total harmonic content. � 2017 IEEE. | en_US |
dc.title | Design and implementation of a symmetrical multilevel inverter topology | en_US |
dc.type | Book chapter | en_US |
Appears in Collections: | 2. Conference Papers |
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