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DC Field | Value | Language |
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dc.contributor.author | Panse, P. | - |
dc.contributor.author | Laxminidhi, T. | - |
dc.date.accessioned | 2020-03-30T10:22:28Z | - |
dc.date.available | 2020-03-30T10:22:28Z | - |
dc.date.issued | 2011 | - |
dc.identifier.citation | Proceedings of the 3rd Asia Symposium on Quality Electronic Design, ASQED 2011, 2011, Vol., , pp.42-45 | en_US |
dc.identifier.uri | http://idr.nitk.ac.in/jspui/handle/123456789/8616 | - |
dc.description.abstract | We present a DC to DC Converter to step down an unregulated DC voltage source of 2.7 - 3.6 V to a regulated 1.8 V DC with peak power efficiency of 94%. The DC to DC Converter, constituted here, is designed for the load current range of 0 to 100 mA. The converter uses a variable switching frequency control method to adjust the power efficiency as well as the ripple to the optimum value as per the load conditions. This control mechanism is implemented by a delta modulator which makes the switching frequency load dependent. The simplicity of the delta modulator causes the silicon real estate as well as the power salvage. It makes the design highly power proficient enabling it to achieve the efficiency greater than the conventional PWM based DC to DC converter. The design, proposed here, procures efficiency of approximately 90% at and above 20% of the full load, and thereby maintains the flat efficiency curve almost over the entire load range. � 2011 IEEE. | en_US |
dc.title | On-chip 1.8 V step down DC/DC converter with 94% power efficiency | en_US |
dc.type | Book chapter | en_US |
Appears in Collections: | 2. Conference Papers |
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